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   <div id="projectname">DM-CtrlH7-BF-DevProgram<span id="projectnumber">&#160;beta 0.1</span>
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   <div id="projectbrief">C.ONE Studio Damiao Development Board Framework</div>
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<div class="contents">
<div class="textblock">Here is a list of all documented macros with links to the documentation:</div>

<h3 class="doxsection"><a id="index_m" name="index_m"></a>- m -</h3><ul>
<li>MDIOS_CR_DPC&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga2d7e0de6a583a2047be88836ed4f0e52">stm32h723xx.h</a></li>
<li>MDIOS_CR_DPC_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga0e56bb31a0ff2b05b6b35dc0a8478c08">stm32h723xx.h</a></li>
<li>MDIOS_CR_EIE&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga9a68fe2e71511060942e6643c6821a7a">stm32h723xx.h</a></li>
<li>MDIOS_CR_EIE_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga520483bd49c6020c7ff3fa33c7bf298b">stm32h723xx.h</a></li>
<li>MDIOS_CR_EN&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad1926459a1636e4615e623750d15f609">stm32h723xx.h</a></li>
<li>MDIOS_CR_EN_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga3d8bcbabb58ea3992a50fd37bc0f3f3c">stm32h723xx.h</a></li>
<li>MDIOS_CR_PORT_ADDRESS&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga0a4620e676836a1ff0c2ae7f68c55a82">stm32h723xx.h</a></li>
<li>MDIOS_CR_PORT_ADDRESS_0&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga03d50a6b84ec1dd9e337a90184bce4d7">stm32h723xx.h</a></li>
<li>MDIOS_CR_PORT_ADDRESS_1&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gafdf6ecdb689705ecba19134acda83588">stm32h723xx.h</a></li>
<li>MDIOS_CR_PORT_ADDRESS_2&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaa63c4f1ff68e27bd4b363d3bdffbb52b">stm32h723xx.h</a></li>
<li>MDIOS_CR_PORT_ADDRESS_3&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga5186cb315eea3a25abeb679b7a0ec515">stm32h723xx.h</a></li>
<li>MDIOS_CR_PORT_ADDRESS_4&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga4e5596a0f416802f2f9c587119ff8489">stm32h723xx.h</a></li>
<li>MDIOS_CR_PORT_ADDRESS_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab38fa0edd4950fc820003301d3e41a4f">stm32h723xx.h</a></li>
<li>MDIOS_CR_RDIE&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga83c7be835064a776ed4528d8cceb8d6f">stm32h723xx.h</a></li>
<li>MDIOS_CR_RDIE_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga216d4449654a1f64ed7a0418b151d73a">stm32h723xx.h</a></li>
<li>MDIOS_CR_WRIE&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad9496023d7479267e2ea1ce5e7758715">stm32h723xx.h</a></li>
<li>MDIOS_CR_WRIE_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaca184630a08f6458ca4dbfbdc9ef5160">stm32h723xx.h</a></li>
<li>MDIOS_SR_CPERF&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gabd06db1f69facdf687694850335c1b53">stm32h723xx.h</a></li>
<li>MDIOS_SR_CPERF_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae46979b7de05499f23033e25e6e0a89c">stm32h723xx.h</a></li>
<li>MDIOS_SR_CSERF&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga4a57962f55db01c4adf006ce5616313f">stm32h723xx.h</a></li>
<li>MDIOS_SR_CSERF_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf8e2607e09702e86b584def75e8de3fa">stm32h723xx.h</a></li>
<li>MDIOS_SR_CTERF&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga8b5c3743f12fafb713bc71fc3d21337c">stm32h723xx.h</a></li>
<li>MDIOS_SR_CTERF_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga41d2ff02d82a8f74b60c2c71b34c4f63">stm32h723xx.h</a></li>
<li>MDIOS_SR_PERF&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga9d96972d5ccb8181972559a6d9dd9f9f">stm32h723xx.h</a></li>
<li>MDIOS_SR_PERF_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga438990379f87353d92bab5a3c55590ee">stm32h723xx.h</a></li>
<li>MDIOS_SR_SERF&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf8ff329a32e5f3edb841900f8a12182e">stm32h723xx.h</a></li>
<li>MDIOS_SR_SERF_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gafae5ab769299f61bd84e6988b5109a92">stm32h723xx.h</a></li>
<li>MDIOS_SR_TERF&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga93e7fa9171eaf37279bfc6e0491e07ec">stm32h723xx.h</a></li>
<li>MDIOS_SR_TERF_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga860e46e80c117b4af45528fec8556ba7">stm32h723xx.h</a></li>
<li>MDMA_BLOCK_TRANSFER&#160;:&#160;<a class="el" href="group___m_d_m_a___transfer___trigger_mode.html#gaf25ce24f3a14177b6e8f60327b69b05d">stm32h7xx_hal_mdma.h</a></li>
<li>MDMA_BUFFER_TRANSFER&#160;:&#160;<a class="el" href="group___m_d_m_a___transfer___trigger_mode.html#ga4fbad0d3d5d3ae406176ee930b634f6d">stm32h7xx_hal_mdma.h</a></li>
<li>MDMA_CBNDTR_BNDT&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae96b367fad972829944458d72e7f445e">stm32h723xx.h</a></li>
<li>MDMA_CBNDTR_BNDT_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga1addc49393a9b5be401e64473dd3f3e5">stm32h723xx.h</a></li>
<li>MDMA_CBNDTR_BRC&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga69bdf94e143ec1bf45f3181761c0747e">stm32h723xx.h</a></li>
<li>MDMA_CBNDTR_BRC_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga85fc664878337758a159eeea72c8ca8e">stm32h723xx.h</a></li>
<li>MDMA_CBNDTR_BRDUM&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac444e838071254d025f79662083689c5">stm32h723xx.h</a></li>
<li>MDMA_CBNDTR_BRDUM_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga456944d0ca4e69929c0a8653fea40e89">stm32h723xx.h</a></li>
<li>MDMA_CBNDTR_BRSUM&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga8deb26009cd444a090866769c50acee4">stm32h723xx.h</a></li>
<li>MDMA_CBNDTR_BRSUM_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga2a7b09cb690d2a7ebb21f7a1cacf82b5">stm32h723xx.h</a></li>
<li>MDMA_CBRUR_DUV&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf8daf3bb70c0d65a9e33429552a1a07a">stm32h723xx.h</a></li>
<li>MDMA_CBRUR_DUV_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga73c096b4d0bb3f3f14f9cd1688e3804d">stm32h723xx.h</a></li>
<li>MDMA_CBRUR_SUV&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga628be42c2d78c3ec0ea270dc607c3b1c">stm32h723xx.h</a></li>
<li>MDMA_CBRUR_SUV_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga07332938c99c647a4f3ccaf749c2d055">stm32h723xx.h</a></li>
<li>MDMA_CCR_BEX&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab202e8398e0df7423c30c697e4646708">stm32h723xx.h</a></li>
<li>MDMA_CCR_BEX_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac63f390fa174119a5d2c667df6c95ea0">stm32h723xx.h</a></li>
<li>MDMA_CCR_BRTIE&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga5e458b1dc9663cb5bce66d8bbbccd8c6">stm32h723xx.h</a></li>
<li>MDMA_CCR_BRTIE_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga0db8267ebbf03dc014e841db9fc84445">stm32h723xx.h</a></li>
<li>MDMA_CCR_BTIE&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac46954a8902b70f858d54d921e3a81d2">stm32h723xx.h</a></li>
<li>MDMA_CCR_BTIE_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gafe0ac7a9ab8e0430d755fac2ffc38618">stm32h723xx.h</a></li>
<li>MDMA_CCR_CTCIE&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gadefa541e6bb5062f0ecae2c7f95c5082">stm32h723xx.h</a></li>
<li>MDMA_CCR_CTCIE_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga53d0d5d89eb9a289cf6519293d1b2004">stm32h723xx.h</a></li>
<li>MDMA_CCR_EN&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga7a3a8b196868241058a5e099e9cda1ef">stm32h723xx.h</a></li>
<li>MDMA_CCR_EN_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaebddd2bf39ffe53b1c8df397a1f40522">stm32h723xx.h</a></li>
<li>MDMA_CCR_HEX&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga590623de84808dca1f06855f475ecae4">stm32h723xx.h</a></li>
<li>MDMA_CCR_HEX_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga06cd7e4620376917f1df8b6cf6dc5d3e">stm32h723xx.h</a></li>
<li>MDMA_CCR_PL&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae14502bb421c1d1f8454519fc0d69f49">stm32h723xx.h</a></li>
<li>MDMA_CCR_PL_0&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf761a4e560eb599a27b9ee59a931bbcb">stm32h723xx.h</a></li>
<li>MDMA_CCR_PL_1&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga84bd5ed973aa2d8f7646b1a43070a8ec">stm32h723xx.h</a></li>
<li>MDMA_CCR_PL_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab43209cd6cb3a86760220d4b4632eb19">stm32h723xx.h</a></li>
<li>MDMA_CCR_SWRQ&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga5ccba0311e34981eb6843745a357d8d6">stm32h723xx.h</a></li>
<li>MDMA_CCR_SWRQ_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga9836b6523e242ca9bafce5e72e956bfb">stm32h723xx.h</a></li>
<li>MDMA_CCR_TCIE&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga68296065030eebca929a4006c2974f03">stm32h723xx.h</a></li>
<li>MDMA_CCR_TCIE_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf3aaadebac11eb3dad9d867a6fbd7825">stm32h723xx.h</a></li>
<li>MDMA_CCR_TEIE&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gafdddcb23d16c5fbb6a163556116fbd4c">stm32h723xx.h</a></li>
<li>MDMA_CCR_TEIE_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad01f5ba64639f8a232788e8a11f377c4">stm32h723xx.h</a></li>
<li>MDMA_CCR_WEX&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gacaa892fc50279fdab3b93322365baf07">stm32h723xx.h</a></li>
<li>MDMA_CCR_WEX_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga2c5a26bf011ab874945a2dacdb36724a">stm32h723xx.h</a></li>
<li>MDMA_CDAR_DAR&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf688c13654a46c72fc9f4e280933a992">stm32h723xx.h</a></li>
<li>MDMA_CDAR_DAR_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae1ea19c98cdf0994aeb4b57a0ae7c1b1">stm32h723xx.h</a></li>
<li>MDMA_CESR_ASE&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga68db819fafa277f8947903af4526c54c">stm32h723xx.h</a></li>
<li>MDMA_CESR_ASE_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga6f44d524684da1a1da843aa4bd00b777">stm32h723xx.h</a></li>
<li>MDMA_CESR_BSE&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gace433a2f270cbe1de9c916611ad68c6a">stm32h723xx.h</a></li>
<li>MDMA_CESR_BSE_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gace4e55b25c66ee275ac23e1a68d7c946">stm32h723xx.h</a></li>
<li>MDMA_CESR_TEA&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga523dbe914ccb72aeb8b68ffd2f338ef6">stm32h723xx.h</a></li>
<li>MDMA_CESR_TEA_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga1e4ec2dda59288a8ef8bb5e1177531a9">stm32h723xx.h</a></li>
<li>MDMA_CESR_TED&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab88faaf7cdf57ee375ac93a95e8fd441">stm32h723xx.h</a></li>
<li>MDMA_CESR_TED_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga6e5c23515f9a0922b094add1d3cc3855">stm32h723xx.h</a></li>
<li>MDMA_CESR_TELD&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gacfb83c7f6143dd812a8c565fefb6b29e">stm32h723xx.h</a></li>
<li>MDMA_CESR_TELD_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga2047912b999fbc93c573fbb71e0bc0b2">stm32h723xx.h</a></li>
<li>MDMA_CESR_TEMD&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaffc5cbae01249e4a3056a40a8b338d2d">stm32h723xx.h</a></li>
<li>MDMA_CESR_TEMD_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga975d7053b12a8ab8c31bafc595975335">stm32h723xx.h</a></li>
<li>MDMA_CIFCR_CBRTIF&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac280d4edc5d4d2fb8e692b2663e6c019">stm32h723xx.h</a></li>
<li>MDMA_CIFCR_CBRTIF_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga9eb6a151f49cbe6da20d1a8ca29e69f8">stm32h723xx.h</a></li>
<li>MDMA_CIFCR_CBTIF&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaa79dafdf33d9404d5ca8ca93d30b41cf">stm32h723xx.h</a></li>
<li>MDMA_CIFCR_CBTIF_Msk&#160;:&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga66caf07bf3302030f186a91f8eda6859">stm32h723xx.h</a></li>
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